Elektor’s Summer Circuits are traditionally small projects, always inviting to experimentation and enhancement. While you can test most of them by soldering or breadboarding parts on a Sunday afternoon, consider running a simulation of these circuits in virtual operation. Here we show the use of TINA or TINACloud to comprehend, test, and analyze a simple audio power amplifier without the risk of solder fumes, smoke, or blown fuses.
In this video, first, we will demonstrate how to simulate and synthesize a circuit, displaying prime numbers. In our circuit, “PIC16F84_Prime_number_generator_Sim_DE10-Lite” we will use a PIC MCU VHDL code.
This circuit calculates prime numbers between 1 and 9999 and shows them on a 4-digit 7-segment display.
The four digits have 32 pins (4 times 8).
Given that the PIC has limited number of lines to control the display, we use an array of registers, which is implemented in the DisplayRegisters VHDL macro.
The Display Registers
The register array is implemented in the DisplayRegisters VHDL macro.
The registers will be written by the PIC chip.
The macro has two inputs: „sel” and „d ”. Both are VHDL standard logic vector connected to the MCU port by buses.
Each registered output goes to the appropriate digit passing the 7-segment codes to the display.
When one line of the sel input goes low, then the 7-segment code, – asserted on the ‘d’ bus by the MCU, – will be stored in the appropriate output register.
Note, that to turn a segment on, the proper pin should be at a high level, because our display is common cathode type.
The PIC16F84 MCU model
In this circuit, the PIC MCU model is written in VHDL.
Next, we will look at the VHDL code which is implemented in the PIC16F84 MCU model. Among others we will check the the top-level entity, then the rtl_pic entity, in which we instantiate and connect the main components.
We will also take a look at the flash_rom entity, where the prime number generator program was loaded.
Next, in line 76 you we check the case construction which describes the ROM functionality.
Finally, we look at the ROM content of the program code written in C, which we have already converted to this VHDL code.
The C code
In the following we will look at the C code.
It is good to know that the project was created, and the program was developed with the free version of Microchip MPLAB IDE and their Microchip XC8 compiler.
If a number is prime, we will generate the digits and display the number.
Running the simulation using TINACloud’s Schematic Editor
After that we run the simulation in TINACloud Schematic Editor.
It is also possible to follow the transitions of the digital nodes, if you switch to the “Show Digital Node States” option.
Making the main difference in the C code for the synthesis
Next, we return to the MBLAB editor to make the main difference in the C code for the synthesis.
We comment the SIM definition out. Thus, we have defined new constants, like the processor speed in(50 MHz).
This is the oscillator frequency of the DE10-Lite FPGA board.
Testing our circuit with the Terasic DE10-Lite FPGA board
The Terasic DE10-Lite FPGA board: generating prime numbers
Finally, we will test our circuit, ” PIC16F84 Prime number generator DE10 Lite ” in a real environment using the Terasic DE10-Lite FPGA board.
We will export the VHDL to the Quartus Prime Lite software, compile it and load the resulting bitstream into the Terasic DE10-Lite FPGA development board.
As soon as we finish programming the hardware and we turn the Terasic DE10-Lite board on, we can see the prime numbers written on the display as expected.
In this video, first, we will demonstrate how to simulate and synthesize a circuit displaying prime numbers using a PIC MCU VHDL code.
In the end, we will download the circuit’s configuration file to the Terasic DE10-Lite FPGA board.
PIC16F84 Prime number generator Sim DE10 Lite circuit
This circuit calculates prime numbers between 1 and 9999 and shows them on a 4-digit 7-segment display.
The four digits have 4 times 8, 32 pins.
Since the PIC has limited number of lines to control the display, we use an array of registers to extend its capability.
The register array is implemented in the DisplayRegisters VHDL macro.
The registers will be written by the PIC chip.
The macro has two inputs: „sel” and „d ”.
Both are VHDL standard logic vector connected to the MCU port by buses.
The ‘sel’ lines go to the MCU port RA, the ‘d’ to the port RB.
The hex vectors are the outputs on the port list.
Each registered output goes to the appropriate digit passing the 7-segment codes to the display.
When one line of the sel input goes low, then the 7-segment code, – asserted on the ‘d’ bus by the MCU, – will be stored in the appropriate output register.
Note: To turn a segment on, the proper pin should be at a low level, because our display is of the common cathode type.
The PIC MCU model is written in VHDL.
The VHDL code is the functional model of a PIC16F84 8-bit microcontroller with initialized flash program memory.
CLK1 provides the external 10-MHz clock.
Looking at the VHDL code
Next, we look at the VHDL code using TINA HDL Editor.
Checking the C code
In the following, we will check the program code written in C and converted to this VHDL code.
The project was created, and the program was developed with the free version of Microchip MPLAB IDE and their Microchip XC8 compiler.
We start MBLAB.
First, we define SIM, indicating that we are running a simulation.
The code writes prime numbers between 1 and 9999 with the help of a for loop starting from line 77.
A digit is displayed by writing the representative 7-segment code to the digit’s external register.
Digital circuit simulation
After that, we return to TINA’s Schematic Editor to test our circuit with digital circuit simulation.
Testing our circuit in a real environment
Making the main difference in the C code for the Synthesis
Then, we’ll open again the MPLAB editor to make the main difference in the C code for the synthesis, like the processor speed (50 MHz). This is the oscillator frequency of the Terasic DE10-Lite FPGA board.
Compiling the project
Next, we compile the project and convert the result – the executable binary – into VHDL. The code is placed in the flash ROM component of our VHDL PIC model.
PIC16F84 Prime number generator DE10 Lite circuit
Finally, we will test our circuit, ” PIC16F84 Prime number generator DE10 Lite ” in a real environment using the Terasic DE10-Lite FPGA board.
We have FPGA pins connected to the segments of the displays and the clock input pin of the PIC MCU.
The com pin of the displays can be left floating as the common anode of the digits is hardwired on the board.
Using the Quartus Prime Lite software to program the hardware
We will export the VHDL to the Quartus Prime Lite software, compile it and load the resulting bitstream into the Terasic DE10-Lite FPGA development board.
Testing the circuit with the Terasic DE10-Lite board
As soon as we finish programming the hardware and we turn the Terasic DE10-Lite board on, we can see the prime numbers written on the display as expected.
In this video, first, we will demonstrate how to simulate and synthesize a circuit displaying prime numbers using a PIC MCU VHDL code.
Then, we will download the circuit’s configuration file to the Digilent Basys 3 FPGA board.
In our circuit, PIC16F84_Prime_number_generator, the PIC MCU model is written in VHDL. The VHDL code is the functional model of a PIC16F84 8-bit microcontroller with initialized flash program memory.
Looking at the VHDL code in TINACloud’s HDL editor
First, we look at the VHDL code using TINACloud’s HDL Editor.
The top-level entity is rtl_pic.
In the architecture section bound to the rtl_pic entity (line 1828), we instantiate and connect the main components.
These components are the pic_core (line 1830), the 1k*14 bits flash_rom (line 1890), and the PIC16F_RAM file register (line 1898).
TINACloud’s HDL Editor window
From line 1941, the instantiation statements connect these declared components to signals in the architecture (1941–2002), followed by auxiliary VHDL code to support reset and IO updates.
Looking at the C code in the MPLAB editor
Next, we will check the program code, written in C and converted to this VHDL code.
The project was created, and the program was developed with the free version of Microchip MPLAB IDE and their Microchip XC8 compiler.
Let’s open the MPLAB editor.
First, we define SIM, indicating that we are running a simulation (line 3).
If SIM is defined, then other constants are created in lines 6–10.
The XTAL FREQ is the processor frequency for the simulation.
The other parameters are for handling the display.
The code writes prime numbers between 1 and 9999 with the help of a for loop starting from line 98.
If a number is prime, we will generate the digits and display the number.
We have 8 bits to write a digit (PORTB) and 4 bits (PORTA) to select which one to display.
One digit is displayed for a very short time in the millisecond domain.
When a digit is displayed, the other digits are dark. This process is performed from line 107.
Circuit simulation
After that, we return to TINACloud’s Schematic Editor to run digital simulation. Then we go back to the MPLAB editor to make the main difference in the C code for the synthesis, like the processor speed (100 MHz). This is the oscillator frequency of the BASYS3 FPGA board.
MPLAB editor
Next, we compile the project and convert the result – the executable binary – into VHDL.
The code is placed in the flash ROM component of our VHDL PIC model.
Testing our circuit in a real environment
Digilent Basys3 board displaying prime numbers
Finally, we will test our circuit, ” PIC16F84_Prime_number_generator_BASYS3” in a real environment using the Digilent BASYS3 FPGA board.
As expected, we can see the prime numbers written on the display.
