VHDL-AMS Simulation

VHDL-AMS Simulation in TINA included in all versions

VHDL-AMS is an extension of the VHDL hardware description language, also included in TINA. It includes Analog and Mixed-Signal extensions (AMS) to the purely digital VHDL language  in order to simulate analog and mixed-signal systems. You can find several circuit examples in the Examples\HDL\VHDL-AMS folder of TINA.

VHDL-AMS example:

Simulation with VHDL-AMS circuit
Simulation with VHDL-AMS: TINA HDL Editor image1
Simulation with VHDL-AMS: TINA HDL Editor image2
Simulation with VHDL-AMS: TINA HDL Editor image3
Simulation with VHDL-AMS: TINA HDL Editor image4
Simulation with VHDL-AMS Transient diagram
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